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Title:
ELECTRON BEAM TEST DEVICE
Document Type and Number:
Japanese Patent JPS6394649
Kind Code:
A
Abstract:

PURPOSE: To greatly shorten the time required for the isolation of a malfunctioning point by a method wherein a spot electron beam is thrown upon a representative potential measuring node and the faulty point is indicated in a circuit pattern displayed on a CRT.

CONSTITUTION: A test pattern is supplied to an IC to be tested and, in the presence of an output signal different from an expected value, the IC is regarded as a faulty IC, and a fail report is prepared thereon. That test pattern only is extracted, and some combinations are made for the preparation of a test pattern most suitable for the isolation of the faulty point in the IC. The fail report is referred to for the selection of a block suspected to be responsible for the failure, and the coordinates of all the representative nodes and the potentials they are expected to indicate are determined. What are thus obtained are memorized in a node coordinate extract section 25 and the circuit pattern is graphically displayed on a CRT. Positions of reference marks are detected by using an electron beam for compensation values, a point in an IC whose potential is to he measured is caused to travel to a place for exposure to an electron beam for a node vector scan. The data is supplied to a measured data ternarization section 27 through an electron beam test control section 28 for the coloring of a CRT-displayed circuit pattern node in response to the result of comparison with the expected values.


Inventors:
NIIJIMA HIRONOBU
Application Number:
JP23998686A
Publication Date:
April 25, 1988
Filing Date:
October 08, 1986
Export Citation:
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Assignee:
ADVANTEST CORP
International Classes:
G01R31/26; G01R31/28; G01R31/302; G01R31/3183; H01J37/28; H01L21/66; G01R19/00; (IPC1-7): G01R19/00; G01R31/26; G01R31/28; H01J37/28; H01L21/66



 
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