Title:
ELECTRONIC CIRCUIT SIMULATOR
Document Type and Number:
Japanese Patent JP2001243272
Kind Code:
A
Abstract:
To realize high speed operation by solving the restriction of an applicable circuit or a difficulty in a parallel processing in obtaining the solution of a sparse matrix in the transient analysis of an electronic circuit simulation.
A loop free code is generated without using an arrayal indirect access so that the circuit simulation is performed at speed being equal to or more than several tens times as high as that of SPICE3f.4 on a single processor system such as WS (work station) or PC (personal computer). Besides, a method of a coarse grain parallel processing by Open MP being a standard API for main storage sharing type multi-processor (SMP) architecture is proposed through the use of circuit division in the method.
Inventors:
KASAHARA HIRONORI
MANAKA KUNIYUKI
MANAKA KUNIYUKI
Application Number:
JP2000055562A
Publication Date:
September 07, 2001
Filing Date:
March 01, 2000
Export Citation:
Assignee:
UNIV WASEDA
International Classes:
G06F17/50; G06F19/00; G01R31/28; (IPC1-7): G06F17/50; G01R31/28; G06F19/00
Attorney, Agent or Firm:
Okuyama Shoichi (2 outside)