PURPOSE: To attain the error detection of multiple bits with less memory quantity by providing an error detection circuit in a disk cache device and error- detecting a memory by means of a check code transferred from a disk.
CONSTITUTION: The disk cache device 13 consists of a hard disk controller (HDC) 14, the memory 15, a directory memory access controller (DMAC) 16, the error detection circuit 17 and a disk cache control part 18. Data from the magnetic disk 11 is transferred to the memory 15 through HDC 14, and the check code added after data is transferred to the memory 15. When data in the memory 15 is transferred to a central processing unit 12, the error detection circuit 17. Thus, error detection is attained with less memory quantity.
JPH06175931 | MEMORY DEVICE |
JPS62274355 | MEMORY ERROR PROCESSING SYSTEM |