Title:
イーサネットインターフェース、並びに関連するシステム、方法、及びデバイス
Document Type and Number:
Japanese Patent JP7504197
Kind Code:
B2
Abstract:
Described is a digital interface and related systems, method and devices. In some embodiments, an interface may be an interface between a link layer and a physical transmission medium. The interface may be configured for a bit rate and/or reference clock that limits electromagnetic emissions (EME), for example, as compared to a bit rate and/or clock rate specified by interfaces widely used in industry.
Inventors:
Ayer, Venkatraman
Chen, Dixon
Zan, John Junlin
Akkihar, Sivanand Ai
Chen, Dixon
Zan, John Junlin
Akkihar, Sivanand Ai
Application Number:
JP2022510900A
Publication Date:
June 21, 2024
Filing Date:
August 05, 2020
Export Citation:
Assignee:
MICROCHIP TECHNOLOGY INCORPORATED
International Classes:
H04L7/00; G06F1/12; H04L69/323; H04L69/324
Domestic Patent References:
| JP2011193039A |
Foreign References:
| EP1940086A1 | ||||
| EP1388975A1 | ||||
| US20130229926 |
Attorney, Agent or Firm:
Patent Attorney Corporation Wisdom International Patent and Trademark Office