Title:
FABRICATION PROCESS OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2008182250
Kind Code:
A
Abstract:
To obtain a TFT in which the off current value is lowered while suppressing variation in order to enhance the operation characteristics of a semiconductor device and to reduce power consumption.
In order to perform gettering of the metal element of a first silicon film crystallized using a metal element for accelerating crystallization of silicon, a second silicon film containing rare gas and having an amorphous structure is used. Laser irradiation is performed twice by changing the atmosphere. When the second laser irradiation is performed such that the irradiation region becomes in inert gas atmosphere, planarity of the first silicon film is enhanced.
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Inventors:
YAMAZAKI SHUNPEI
NAKAJIMA SETSUO
MIYAIRI HIDEKAZU
NAKAJIMA SETSUO
MIYAIRI HIDEKAZU
Application Number:
JP2008024149A
Publication Date:
August 07, 2008
Filing Date:
February 04, 2008
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB
International Classes:
H01L21/20; G02F1/1368; H01L21/322; H01L21/336; H01L21/77; H01L21/84; H01L27/12; H01L29/786; H01L51/50; H05B33/10; H05B33/14
Domestic Patent References:
| JPH09205213A | 1997-08-05 | |||
| JP2001060551A | 2001-03-06 | |||
| JPH04101427A | 1992-04-02 |