Title:
FABRICATION OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2679683
Kind Code:
B2
Abstract:
PURPOSE: To provide a method for fabricating a semiconductor device in which lowering of impurity concentration and deterioration of isolation characteristics are prevented in channel stopper layer while blocking leakage of impurities into an element region.
CONSTITUTION: The method for fabricating a semiconductor device comprises a step for forming anti-oxidation masks 3, 4, 5 having an open isolation region on a silicon substrate 1, a step for depositing a thick isolation oxide 7 by oxidizing the surface of silicon substrate using the anti-oxidation masks, a step for forming eaves 8 on the inner side face of opening in the anti-oxidation mask before or after deposition of the isolation oxide, and a step for forming a channel stop layer 9 on the silicon substrate 1 directly under the isolation oxide 7 by implanting impurity ions into the isolation oxide 7 using the eaves 8 as a mask.
Inventors:
Matsumoto Shigeharu
Application Number:
JP12931295A
Publication Date:
November 19, 1997
Filing Date:
April 28, 1995
Export Citation:
Assignee:
NEC
International Classes:
H01L21/316; H01L21/265; H01L21/76; H01L21/762; H01L29/06; (IPC1-7): H01L21/76; H01L21/266; H01L21/316
Domestic Patent References:
| JP65588A | ||||
| JP5218194A | ||||
| JP5283519A |
Attorney, Agent or Firm:
Suzuki Akio