To make fast a fast Fourier transform device which stores input/ output data and intermediate data of operation in a RAM.

First and second RAMs 111 and 112 store input/output data of the fast Fourier transform device and intermediate data of butterfly operation. An address generation part 101 regularly generates a address AD while taking into account the order of data needed for the butterfly operation. An address conversion part 102 converts the address AD into a bank select signal BK for selecting the 1st or 2nd RAM 111 or 112 and the bank address BAD corresponding to the data in the RAM. A butterfly operation part 104 when performing the butterfly operation of a cardinal number 2 reads and writes data out of and to the 1st and 2nd RAMs 111 and 112 in parallel.