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Title:
FAULT MONITORING SYSTEM
Document Type and Number:
Japanese Patent JPH07319836
Kind Code:
A
Abstract:

PURPOSE: To monitor all processors without increasing the load of a monitor processor even when the number of processors is increased by grouping many processors and logically and hierarchically monitoring faults.

CONSTITUTION: An inner-group monitoring processor 22 monitors only processors in a group 26 to which the processor 22 itself belongs and a monitoring source processor 24 manages the states of all processors in a parallel computer but does not directly monitor all the processors, which are monitored by inner-group monitoring processors in respective groups. Processors 21 in each group transmit 'alive' messages at a fixed interval when they are normal and the processor 22 judges the normality of the processors 21 when the 'alive' messages are received from respective processors 21, and if an 'alive' message is not received from a certain processor 21 for a fixed time or more, judges the generation of a fault in the processor 21.


Inventors:
TANAKA NATSUO
Application Number:
JP11621694A
Publication Date:
December 08, 1995
Filing Date:
May 30, 1994
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F11/30; G06F13/00; G06F15/16; G06F15/173; (IPC1-7): G06F15/16; G06F11/30; G06F13/00
Attorney, Agent or Firm:
Ogawa Katsuo



 
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