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Patent Searching and Data


Title:
FAULT PROCESSING SYSTEM FOR SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS62269254
Kind Code:
A
Abstract:

PURPOSE: To constitute the titled system so that a fault generated while a data, etc., cannot be exchanged with a host device can be reported to the host device, by logging a fault and cutting a power source, when the fault is generated in the course of a data saving operation which is executed at the time of cutting the power source, and reporting the fault contents brought to logging by turning on the power source, to the host device.

CONSTITUTION: At the time of cutting the power source of a power source control part 5, a control part 4 brings a transfer circuit 3 to a saving transfer start, detects the generation of a fault in a saving bus extending from a semiconductor memory part 1 to the first nonvolatile storage part 2, suspends the transfer operation in accordance with the generation of the fault, brings the fault contents to logging (store) to the second nonvolatile storage part 6, and the power source is cut. Also, at the time of turning on the power source, the fault contents of the second nonvolatile storage part 6 are reported to the host device. The host device can know that a data is not secured, and can take suitable steps.


Inventors:
SEKI KAZUHISA
Application Number:
JP11214986A
Publication Date:
November 21, 1987
Filing Date:
May 16, 1986
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F12/16; (IPC1-7): G06F12/16
Attorney, Agent or Firm:
Akira Yamatani