Title:
FERROELECTRIC MEMORY
Document Type and Number:
Japanese Patent JP3720983
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To suppress the generation of problem of imprint of an FRAM cell and prevent soft errors from occurring by introducing a refreshing operation for a memory cell of the FRW.
SOLUTION: In an FRAM, a refreshing control circuit system (23, 24, 25, 26) is provided to control a refreshing operation which sequentially performs a data readout operation for selecting an arbitrary memory cell in a memory cell array 10 at a timing based on an external control signal (/WE before /CE) and reading out binary data from the selected cell, an opposite data writing operation for writing data having a logic level opposite to that of the read binary data into the selected cell, and an identical data writing operation for rewriting binary data having the same logic level as the read data into the selected cell.
Inventors:
Kumi Okuwada
Mitsuru Shimizu
Hideyuki Kamada
Hiroshi Mochizuki
Mitsuru Shimizu
Hideyuki Kamada
Hiroshi Mochizuki
Application Number:
JP17595998A
Publication Date:
November 30, 2005
Filing Date:
June 23, 1998
Export Citation:
Assignee:
Toshiba Corporation
Toshiba Microelectronics Co., Ltd.
Toshiba Microelectronics Co., Ltd.
International Classes:
G11C14/00; G11C11/22; (IPC1-7): G11C11/22
Domestic Patent References:
| JP9265784A | ||||
| JP10162588A | ||||
| JP2066795A | ||||
| JP10083679A | ||||
| JP7073682A |
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai
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