Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FORMATION OF ELECTRODE IN SEMICONDUCTOR INTEGRATED CIRCUIT SUBSTRATE
Document Type and Number:
Japanese Patent JPS60218872
Kind Code:
A
Abstract:

PURPOSE: To obtain an electrode having high connecting reliability, by forming a thin metal film as a protecting layer for preventing oxidation, on a metal film, which is a main body of solder wetting connection, and performing mutual diffusion by heat treatment.

CONSTITUTION: On a substrate 10, the following parts are sequentially formed by evaporation by an electron beam and the like or sputtering: a Cr layer 20 of the first metal film, which is bonded to the substrate 10; a Cu layer 30 of the second metal film, which is a main body of solder wetting connection; and an Au layer 40 of the third metal film as a protecting film for preventing surface oxidation of the second metal film. Heat treatment is performed, and a mixed layer 50 is formed. An electrode pattern is formed by etching. When a flip chip is mounted on the substrate by a fused connecting method, the solder wetting property of the substrate electrode is excellently kept. Therefore, occurrence of poor connection can be reduced.


Inventors:
MURATA AKIRA
OOSHIMA MUNEO
SAKAGUCHI MASARU
SATOU RIYOUHEI
Application Number:
JP7494984A
Publication Date:
November 01, 1985
Filing Date:
April 16, 1984
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
HITACHI LTD
International Classes:
H01L21/28; H01L29/45; (IPC1-7): H01L29/46
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)