Title:
FORMING METHOD OF MARKERS FOR ALIGNMENT OF PATTERNS
Document Type and Number:
Japanese Patent JPS5456373
Kind Code:
A
Abstract:
PURPOSE:To perform accurate and rapid alignment of patterns by forming patterns for markers in places other than the patterns of circuits in the case of forming multiple layers of patterns on a substrate by using planing process. CONSTITUTION:A vapor deposition layer 12 being the patterned layer is formed on a substrate 11 figure (a), and a resist pattern layer 13 composed of circuit portion patterns 13a and marker portion patterns 13b is formed thereon figure (b). The patterns 13b are positioned away from the patterns on the circuit portions on the wafer. Next, the vapor deposition layer 12 is patterned, by which circuit pattern parts 12a and marker pattern parts 12b are formed figure (c). After the resist film of the patterns 13b alone is removed (d), a planing film 15 (makeup portions 15a, marker portions 15b, circuit portions 15c) is formed over the entire part of the wafer figure (e), and in this state the patterns 13a and circuit portions 15c are removed by a lift off process (f), then the vapor depositin layer 12 is planed and the marker potions 15b remain and may be used for alignment.
Inventors:
SEGAWA MIKIO
Application Number:
JP12247377A
Publication Date:
May 07, 1979
Filing Date:
October 14, 1977
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/027; H01L21/68; (IPC1-7): H01L21/68
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