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Title:
FRAME SYNCHRONIZING DEVICE FOR COMMUNICATION TERMINAL
Document Type and Number:
Japanese Patent JPH05199216
Kind Code:
A
Abstract:

PURPOSE: To make sure and accelerate the detection of frame synchronization between terminals having octet synchronization at high communication frequency by providing the detecting operation of a frame synchronizing signal synchronized to octet timing and an asynchronous detecting operation and preferentially executing the detecting operation of the octet synchronization when it is not clear whether the octet synchronization is existent at the opposite side terminal or not.

CONSTITUTION: Communication data are inputted to a 64 bit shift register 11, bit data are shifted in the octet order by a bit clock at 64kHz. A frame synchronization detector 12 is provided to establish synchronization by detecting a frame synchronizing signal FAS from the communication data inputted to the 64 bit shift register 11 and until fixed time passes after communication is started according to the time count of a timer 13, the frame synchronizing signal FAS is detected synchronously to the octet timing. When no frame synchronizing signal FAS is detected even after the lapse of the fixed time according to the time-out of the timer 13, the frame synchronizing signal FAS is detected at all the bit positions asynchronously to the octet timing.


Inventors:
IMAE NOZOMI
Application Number:
JP707092A
Publication Date:
August 06, 1993
Filing Date:
January 20, 1992
Export Citation:
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Assignee:
RICOH KK
International Classes:
H04L7/08; H04N5/073; H04N5/10; H04N7/14; (IPC1-7): H04L7/08; H04N5/073; H04N5/10; H04N7/14
Attorney, Agent or Firm:
Ariga Gunichiro



 
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