Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FREQUENCY DIVIDER, FREQUENCY DIVIDING CIRCUIT, AND PLL CIRCUIT
Document Type and Number:
Japanese Patent JP2003324345
Kind Code:
A
Abstract:

To realize a frequency divider which can have a frequency division ratio 'natural number/2' by using a simple circuit.

The frequency divider which can have the frequency division ratio 'natural number/2' is simplified by providing a 1st both-edge trigger type flip-flop circuit (11) which can be triggered with both leading and trailing edges of an input signal waveform to operate, a 2nd both-edge trigger type flip-flop circuit (12) which is arranged behind the 1st both-edge trigger type flip-flop circuit and can be triggered with both leading and trailing edges of the input signal waveform to operate, and a composite gate (13) which controls the frequency division ratio of the input signal according to the output signals of the 1st and 2nd both-edge trigger flip-flop circuits and a control signal.


Inventors:
MARUYAMA TETSUYA
TANBA HIROKO
Application Number:
JP2002130685A
Publication Date:
November 14, 2003
Filing Date:
May 02, 2002
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
HITACHI LTD
International Classes:
G06F1/08; H03K23/00; H03K23/64; H03L7/197; (IPC1-7): H03K23/00; G06F1/08; H03K23/64; H03L7/197
Attorney, Agent or Firm:
Tamamura Shizuyo



 
Previous Patent: PROGRAMMABLE LOGIC DEVICE

Next Patent: SIGNALING ARRANGEMENT