PURPOSE: To improve the phase noise characteristic by providing a voltage controlled oscillator, a reference signal generator, a sampler, a frequency divider, a controller and a phase detector.
CONSTITUTION: An output signal fR of a reference signal generator 1 is fed to a switching type frequency divider 6 and the frequency division number is switched into p-1 and (p) according to a control signal from a controller 7. The order of appearance of p-1, p is calculated and decided by the controller 7 depending on the output frequency of a required voltage controlled oscillator 3 and the output frequency of the reference signal generator 1. Then the output signal of the switching frequency divider 6 and the output signal of the sampler 8 are fed to a phase frequency detector 2 to compare the phase and frequency of the both, retiming is applied to both the signals as required and the phase of both the signals is made coincident with the timing of the reference signal of the reference signal generator 1. An output detection error signal of the phase frequency comparator 2 is fed back negatively to the frequency control terminal of the voltage controlled oscillator 3 to stabilize the output frequency of the voltage controlled oscillator 3 to a required frequency. Thus, excellent phase noise characteristic is obtained.
| WO/2009/121702 | PHASE-LOCKED LOOP MODULATION |
| JP2593598 | [Title of Invention] Digital Phase Locked Loop |
| JPS54128253 | FREQUENCY SYNTHESIZING CIRCUIT |
ISHIKAWA TOMOYOSHI
TANAKA HIROYUKI
| JPS509360A | 1975-01-30 | |||
| JPS536151U | 1978-01-19 |
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