Title:
GAIN CONTROL AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JP3827444
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a gain control amplifier circuit without causing deterioration in distortion characteristic at the reducing of the amplification degree.
SOLUTION: Since a collector current flowing through 2nd and 4th transistors 6 and 8 is large and also, collector voltage is low when an input signal is in a small state, both a base bias voltage applied to the base of a 5th transistor 9 via resistors 17 and 26 and a base bias voltage applied to a 6th transistor 10 via resistors 18 and 27 become low, and on the other hand, although the collector current of the transistor 6 and 8 becomes conversely small and gain is reduced when the input signal becomes large, the base bias voltages of the transistors 9 and 10 become large to make an operation current of a circuit in a low gain state large, thus the deterioration of a distortion characteristic can be suppressed.
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Inventors:
Ushida Susumu
Application Number:
JP13426998A
Publication Date:
September 27, 2006
Filing Date:
April 30, 1998
Export Citation:
Assignee:
New Japan Radio Co., Ltd.
International Classes:
H03G3/10; H04N5/52; H03F3/45; (IPC1-7): H03G3/10; H03F3/45; H04N5/52