PURPOSE: To obtain one chip gate array circuit, which is provided with memories having higher general-purpose properties and gate arrays, and a field programmable gate array circuit by a method wherein the gate arrays for processing data, which is supplied from the memories, are respectively provided on the plane regions, which are different from one another, of one integrated circuit.

CONSTITUTION: A memory part 11, which consists of a plurality of pieces of small-scale memories, an input/output control circuit 12, which is one for controlling the input/ output (a pair of the number of input/output bits X the number of storage words) of this memory part 11 and is constituted of a transistor, a buried wiring and the like, and a gate array master 13, which is formed on the whole region excepting the memory part 11 and the circuit 12 within a circuit chip 10, are respectively arranged on the plane regions, which are different from one another, of one integrated circuit. In such a gate array circuit, the number of the bits of the plurality of the memories and the number of the words are subjected to variable input/output control by the input/output control circuit arranged serarately from the gate arrays. Accordingly, the number of the bits of the plurality of the memories and the number of the words can be adjusted by the input/output circuit.