Title:
RESIN-SEALED PACKAGE AND ELECTRONIC CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JP3169753
Kind Code:
B2
Abstract:
PURPOSE: To prevent faulty connections between solder and a semiconductor chip thereby enhancing the reliability by making smaller the coefficient of thermal expansion of filled resin than that of the solder.
CONSTITUTION: Output/input terminals of a semiconductor chip 1 are connected by flip chip bonding with solder 2 to an intermediate carrier substrate 4 made of a resin, the semiconductor chip 1 is sealed with a mold resin 3, and resin 9 is filled between the semiconductor chip 1 and the intermediate carrier substrate 4. The mold resin 3 and the filling resin 9 are made into one united body using the same resin, and the coefficient of thermal expansion of the mold resin 3 and the filling resin 9 is smaller than that of the solder 2 and larger than that of the intermediate carrier substrate 4. Thus, when thermal stresses occur in the filling resin 9 and solder 2 as a result of heat applied during actual operation, a force acting from the filling resin 9 to the solder 2 is small, so that no faulty connection occur between the solder 2 and the semiconductor chip 1.
Inventors:
Kawai Tsubun
Ryohei Sato
Ryohei Sato
Application Number:
JP25394893A
Publication Date:
May 28, 2001
Filing Date:
October 12, 1993
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
H01L21/60; H01L23/12; H01L23/29; H01L23/31; H01L23/32; (IPC1-7): H01L21/60; H01L23/12
Domestic Patent References:
| JP61271847A | ||||
| JP62136865A | ||||
| JP269945A | ||||
| JP63316447A | ||||
| JP6325686A | ||||
| JP6094744A | ||||
| JP394460A | ||||
| JP422144A | ||||
| JP4211150A | ||||
| JP5326625A |
Attorney, Agent or Firm:
Yoshihiko Izumi
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