Title:
高性能ＡＨＣＩインターフェイス
Document Type and Number:
Japanese Patent JP5896328
Kind Code:
B2
Abstract:
A method includes receiving from a host multiple commands for execution in a memory, in accordance with a storage protocol that supports processing of only a single command at any given time. At a first time, a first command is executed in the memory and data related to the first command is exchanged with the host, even though a second command, different from the first command, is selected to serve as the single command for which the processing is currently supported in accordance with the storage protocol. A progress of the first command is reported to the host at a second time, which is later than the first time, upon detecting that the first command is selected to serve as the single command for which the processing is currently supported.
Inventors:
Arie Pered
Application Number:
JP2012289464A
Publication Date:
March 30, 2016
Filing Date:
December 26, 2012
Export Citation:
Assignee:
Apple Inc.
International Classes:
G06F3/06; G06F12/00
Domestic Patent References:
| JP2005215729A | ||||
| JP4190435A | ||||
| JP11167557A | ||||
| JP5189154A | ||||
| JP2011048691A |
Foreign References:
| WO2010074944A2 | ||||
| WO2012044609A2 | ||||
| US20100067133 | ||||
| US20090006670 | ||||
| US20110131360 |
Attorney, Agent or Firm:
Koichi Tsujii
Sadao Kumakura
Fumiaki Otsuka
Takaki Nishijima
Hiroshi Uesugi
Naoki Kondo
Sadao Kumakura
Fumiaki Otsuka
Takaki Nishijima
Hiroshi Uesugi
Naoki Kondo