Title:
HIGH PERMITTIVITY MATERIAL FORMING COMPONENT OF DRAM STORAGE CELL
Document Type and Number:
Japanese Patent JP3887267
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method, as well as structure, for manufacturing a dynamic random access memory device and a related transistor at the same time.
SOLUTION: A channel region and a capacitor opening are formed in a substrate by this method. Then a capacitor conductor is allowed to stick to the capacitor opening. A single insulator layer is formed above the channel region and the capacitor conductor at the same time. The single insulator layer contains a capacitor node dielectrics above the capacitor conductor while a gate dielectrics above the channel region. A single conductor layer is patterned above the single insulator layer at the same time. The single conductor layer contains a gate conductor above the gate dielectrics while a ground plate above the capacitor node dielectrics.
Inventors:
Lawrence A. Clevenger
Louis El Shoe
Karl Jay Radens
Joseph F Shepherd Jr.
Louis El Shoe
Karl Jay Radens
Joseph F Shepherd Jr.
Application Number:
JP2002142692A
Publication Date:
February 28, 2007
Filing Date:
May 17, 2002
Export Citation:
Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
H01L21/8242; H01L27/108; H01L29/786; H01L21/02; H01L27/12; (IPC1-7): H01L21/8242; H01L27/108; H01L29/786
Domestic Patent References:
| JP3173175A | ||||
| JP5160366A | ||||
| JP2000243979A |
Other References:
Albert Chin,et al.,High Quality La2O3 and Al2O3 Gate Dielectrics with Equivalent Oxide Thickness 5-10Å,2000 Symposium on VLSI Technology Digest of Technical Papers,米国,IEEE,2000年 6月13日,16-17
Attorney, Agent or Firm:
Takeshi Ueno
Hiroshi Sakaguchi
Yoshihiro City
Hiroshi Sakaguchi
Yoshihiro City