Title:
キャビティに形成される電子デバイスを製造する方法
Document Type and Number:
Japanese Patent JP7009186
Kind Code:
B2
Abstract:
An electronic device includes a first substrate and a second substrate. A side wall joins the first substrate to the second substrate. The side wall includes a first alloy layer of a first metal and a second metal bonded directly to an upper surface of the first substrate and a second alloy layer of the first metal and a third metal disposed on top of the first alloy layer and bonded directly to a lower surface of the second substrate, the second metal and the third metal being different from each other and from the first metal. An electronic circuit is disposed on the lower surface of the second substrate within a cavity defined by the lower surface of the first substrate, the upper surface of the second substrate, and the side wall.
Inventors:
Takano Atsushi
Application Number:
JP2017231501A
Publication Date:
January 25, 2022
Filing Date:
December 01, 2017
Export Citation:
Assignee:
SKYWORKS SOLUTIONS,INC.
International Classes:
H03H3/02; H01L23/02; H03H9/05; H03H9/17
Domestic Patent References:
| JP2015091065A | ||||
| JP2015024443A |
Foreign References:
| WO2010021267A1 | ||||
| WO2010005061A1 |
Attorney, Agent or Firm:
Hidekazu Miyoshi
Masakazu Ito
Yuko Hara
Masakazu Ito
Yuko Hara
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