PURPOSE: To increase the read processing speed by preliminarily storing a prescribed logic value in the storage area of a storage part and omitting the write to the storage part at the time of reading out binarized data having the same logic as this logic value.

CONSTITUTION: A read control part is provided with a storage part 8 having storage areas corresponding to arrays of pixel groups, a comparator 7 which compares respective pixel signals with a prescribed threshold to convert them to binarized data, and a timing generator 3 which controls the read timing of pixel signals. After initialization processing where prescribed logic data is preliminarily stored in all storage areas of the storage part 8, write to the storage part 8 is omitted to increase the scanning speed of a shift register 2 if binarized data having the same logic as this logic data is read out. If a pixel signal having the inverted logic of this logic data is read out, write to the storage part 8 is performed.