Title:
【発明の名称】2つのクロック信号間のスキューを検査するための装置
Document Type and Number:
Japanese Patent JP2657363
Kind Code:
B2
Abstract:
The present invention relates to a device for monitoring the phase shift between any two clock signals from among several clock signals (CK1-CKn) of the same frequency. The two clock signals of each possible pair of clock signals respectively enable two successive flip-flops (50, 51) which are initially in separate states, the set of flip-flops being connected in a looped-back shift-register configuration. An alarm signal (AL) is supplied by an exclusive OR gate (43, 53) receiving the outputs of two successive flip-flops of the shift register.
Inventors:
JANNPIEERU SHOORUKOFU
Application Number:
JP24418394A
Publication Date:
September 24, 1997
Filing Date:
October 07, 1994
Export Citation:
Assignee:
ESU JEE ESU TOMUSON MIKUROEREKUTORONIKUSU SA
International Classes:
G01R25/00; G01R31/30; G01R31/317; G06F1/04; G01R31/28; H03K5/26; (IPC1-7): G01R31/28; G01R25/00; H03K5/26
Domestic Patent References:
| JP6417515A |
Attorney, Agent or Firm:
Fukami Hisaro (3 outside)