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Title:
IMAGE DISPLAY DEVICE USING TRANSISTOR HAVING POLYCRYSTALLINE SEMICONDUCTOR LAYER, AND METHOD FOR MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2003282593
Kind Code:
A
Abstract:

To provide an image display using transistors each having a polycrystalline semiconductor layer constructed so that drain and source regions are fully activated, and to provide method for manufacturing the image display and a polycrystalline semiconductor layer constructed so that impurity concentrations are easy to be controlled in LDD regions.

In this image display using transistors each having a polycrystalline semiconductor layer and a gate electrode is formed through an insulating film on the upper surface of the polycrystalline semiconductor layer, and a drain region is formed on one side of the gate electrode of the polycrystalline semiconductor layer, and a source region is formed on another side of the gate electrode of the polycrystalline semiconductor. An activated p-type impurity is doped to a region underlying the gate electrode of the polycrystalline semiconductor layer, and the activated n-type impurity is doped to a region excluding an area underlying the gate electrode.


Inventors:
GOTO JUN
SAITO KATSUTOSHI
OKURA OSAMU
TAKASAKI YUKIO
YAMAMOTO MASANAO
Application Number:
JP2003003057A
Publication Date:
October 03, 2003
Filing Date:
January 09, 2003
Export Citation:
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Assignee:
HITACHI DISPLAYS LTD
HITACHI DEVICE ENG
International Classes:
G02F1/1368; H01L21/20; H01L21/265; H01L21/336; H01L29/786; (IPC1-7): H01L21/336; G02F1/1368; H01L21/20; H01L21/265; H01L29/786
Attorney, Agent or Firm:
Akita Aki