Title:
画像処理回路、画像処理方法及び撮像装置
Document Type and Number:
Japanese Patent JP5310315
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an image processing circuit which reduces effects of focus deviation after automatic focusing.SOLUTION: The image processing circuit is provided with: a system control unit 19 including an AF control unit 19a which executes AF control discrimination which makes a peak position where the AF evaluation value becomes maximum, as a focusing position; and a signal processing unit 16 including an AF evaluation value calculation unit 70 which calculates the AF evaluation value for every lens positions at a time of AF control, and also calculates the AF evaluation value at a shuttering time. The signal processing unit 16 is provided with: a correction value calculation unit 80 which calculates a correction value according to a difference value between the AF evaluation value in the focusing position and the AF evaluation value at the shuttering time, and an inclination of the AF evaluation values in the plurality of lens positions; and an edge emphasizing unit 40 which emphasizes edge components of the image data based on an edge emphasizing amount corrected by the correction value.
Inventors:
Okudera Hirotaka
Application Number:
JP2009155578A
Publication Date:
October 09, 2013
Filing Date:
June 30, 2009
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
H04N5/232; G02B7/28; G03B13/36
Domestic Patent References:
| JP63030073A | ||||
| JP2006238135A |
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda