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Patent Searching and Data


Title:
IN-PHASE SYNTHESIS TYPE SD RECEIVER
Document Type and Number:
Japanese Patent JP2540476
Kind Code:
B2
Abstract:

PURPOSE: To provide an in-phase synthesis type SD receiver in which opposite phase synthesis is avoided in the process of synthesis/restoration of a sub-signal when a fault in an SD control system is recovered.
CONSTITUTION: This receiver is provided with a quadrature amplitude modulation type endless phase shifter(EPS) 2. A drive circuit 7 uses an amplitude variable section 7b to control a drive section 7a according to an SD control signal and allows the EPS 2 to output a phase shifter control signal. That is, only the output phase of the EPS 2 is controlled in the steady-state and when the SD control signal represents an SD control fault, the drive circuit 7 controls the EPS 2 to output zero. When the SD control signal indicates the SD control normal state after that, the drive circuit 7 controls the EPS 2 to increase its output amplitude gradually and to shift the output phase equivalent to a phase dead band and to exit early the state of operation started from an inverted phase dead band thereby avoiding the opposite phase synthesis.


Inventors:
AKAHORI SATORU
Application Number:
JP19156592A
Publication Date:
October 02, 1996
Filing Date:
June 25, 1992
Export Citation:
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Assignee:
JAPAN RADIO CO LTD
International Classes:
H04B7/08; (IPC1-7): H04B7/08
Attorney, Agent or Firm:
Hachiman Yoshihiro