PURPOSE: To provide the general purpose neurocomputer which realizes correspondence to plural learning algorithms, and also, is operated at an instruction executing speed equal to a hard wired system, and moreover, requires substantially ignorable the time for rewriting a microprogram.
CONSTITUTION: The neurocomputer 501 includes a neuron array 3300 constituted of plural neurons 3310, a control storage device 524-1, a parameter register 524-2, control logic 521 and a global memory 525. A host 502 is an user interface part, and the part for inputting information required for learning and execution of the neurocomputer, such as a learning algorithm, a neural network structure, the number of times of learning, the number of input patterns, an input signal, a teacher signal, etc., to the inside of the system. These information inputted from the host 502 is transferred to the neurocomputer 501 through SCSI interfaces 551-503.
SHIBATA KATSUNARI
SAKAGUCHI TAKAHIRO
ASAI MITSUO
HASHIMOTO MASA
TAKAYANAGI HIROSHI
OKABASHI TAKUO
MOGI KEIJI
KUWABARA YOSHIHIRO
OCHIAI TATSUO
HITACHI MICOM SYST KK