Title:
INFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JPH01184577
Kind Code:
A
Abstract:
PURPOSE:To accelerate an operation by executing the setting of a state bit register for the same processing on all elements in a group, and performing the operation by the indication of the state bit register at the time of reading. CONSTITUTION:A group number part out of six bits of a vector index register 2 sets '0' on a counter 9. Also, an element number is compared with a vector index value at a comparator 10, and when it is less than the vector index value, a value inputted from a bus 57 to a selector 14 is set at '0' compulsorily. Therefore, '0's are set on the elements from a first element in the group to the element just before the element shown by a vector index. And when a group state bit on a bus 54 is set at '1', a selector 17 sets '0' on a bus 58 compulsorily. In such a way, it is possible to read out 0 data correctly in spite of the actual value of the element.
Inventors:
INOUE MASATSUGU
WATABE YASUO
ASASHITA TOMOYOSHI
WATABE YASUO
ASASHITA TOMOYOSHI
Application Number:
JP835888A
Publication Date:
July 24, 1989
Filing Date:
January 20, 1988
Export Citation:
Assignee:
HITACHI LTD
HITACHI COMPUTER ENG
HITACHI COMPUTER ENG
International Classes:
G06F17/16; (IPC1-7): G06F15/347
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)