Title:
INFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JPH01185731
Kind Code:
A
Abstract:
PURPOSE:To perform the execution of a program described in plural machine language sets by one processor by using plural instruction conversion units to convert a machine language instruction to a firmware instruction. CONSTITUTION:The programs A and B described in different machine language instruction sets are stored in a main memory 6. The instruction conversion unit 2 is used to convert the program A to the firmware instruction, and the instruction conversion unit 3 to convert the program B to the firmware, respectively. When a stored program A is operated, a CPU 1 selects the instruction conversion unit 2 by outputting (0) to a selection signal line 8, and outputs an address to an address bus 10, and fetches the machine language instruction from the main memory 6 or a code cache 4. Also, when control is shifted to the program B, the CPU 1 outputs (1) to the selection signal line 8, then, the instruction conversion unit 3 is selected, and the machine language instruction of the program B is fetched. In such a way, it is possible to operate the programs with different kinds of machine language instruction sets by one kind of processor.
Inventors:
BABA SEIJI
Application Number:
JP946588A
Publication Date:
July 25, 1989
Filing Date:
January 21, 1988
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F9/22; G06F9/30; G06F9/44; G06F9/455; (IPC1-7): G06F9/22; G06F9/44
Attorney, Agent or Firm:
Naoki Kyomoto (3 outside)