PURPOSE: To surely perform the load/store instruction test of a buffer storage means by a combination of a simple instruction and a data, by allowing the titled processor to have the second store instruction for executing a store to one of the buffer storage means or a main storage means.

CONSTITUTION: From a data processing means 1, a store instruction to a buffer storage means 3 and a main storage means 2 is executed. Subsequently, from the means 1, a loading request of a data A is executed, and since a data does not exist, the means 3 reads out the data A from the means 2 and registers it to the means 3. From the means 1, the second store instruction for rewriting only the data A existing in the means 2 is issued, and a data B is stored to only the means 2. Subsequently, from the means 1, a loading instruction is issued again. In this case, in the means 3, the data A is to exist, and whether the data which has been read out is A or not is decided by the means 1, by which a load instruction test of the means for deciding to be normal, and an incorrect operation, in case of the data A, and others, respectively can be executed.