PURPOSE: To perform other processes while a central processing unit (CPU) is transferring the information by setting a parameter and a command into a memory for transfer of information to a peripheral device control circuit and adding an information transfer control circuit between the CPU/memory and the peripheral device control circuit.

CONSTITUTION: An address length control circuit 5 receives a start instruction from a CPU 1 and sends the parameter/command information continuously to a peripheral device control circuit 7 via a memory 2 until the value of a length counter is equal to zero. An access circuit 3 for CPU 1 monitors the status of an access circuit 6 for both circuits 5 and 7 via a bus 17 during the transfer of information. When the transfer of information is through, this end is informed to the CPU 1 via a bus 12. Thus the CPU 1 informs the start instruction to the circuit 5 and can perform other processes before the end is informed to the CPU 1 form the circuit 3.