PURPOSE: To improve remarkably the latchup strength by using the collector output of a bipolar transistor (TR) so as to turn on/off the 3rd and 4th TRs.
CONSTITUTION: When a current is injected negatively through an output terminal 20 externally, a TR Q10 is turned off and a TR Q20 is turned on, a collector current flows and the inverse of current IINJ drawn from the output terminal 20 is supplied from a power supply VDD via a TR 24. Thus, the injection current IDD of an output stage circuit 19 is suppressed to improve the latchup strength. When the current is injected positively, the TR Q20 is turnedoff and the TR Q10 is turned on to flow a collector current and the current IINJ(+) injected from the output terminal 20 is applied from the power supply VSS via a TR 22. Thus, the current ISS of the output stage circuit is suppressed to improve the latchup strength.
JPS59165448 | COMPLEMENTARY SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
JP5089082 | Manufacturing method of semiconductor device |
JPS61196568 | SEMICONDUCTOR DEVICE |
ANPO MASAHARU