To reduce delay to be caused at the time of transmitting a system clock from on a circuit board to a circuit element inside an LSI and skew of a clock signal to be received between the different circuit elements on the LSI in a logic system constituted on a circuit board.

In an integrated circuit device consisting of in-and-output circuit regions 12, where a circuit region 11 having an integrated circuit element on a semiconductor substrate is provided with a protective circuit belonging to the in-and-output circuits, and a function circuit region 13 provided with an operation circuit or a memory circuit, the circuit region 11 is provided with at least two pads and at least one of the pads is arranged in the function circuit region 13 and the same clock signal is entered into each pad. The clock signal is transmitted through a conductor transmitting the signal in contact with a wiring and the pad on the circuit board mounting the integrated circuit device.