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Title:
磁性メモリを備えた集積回路
Document Type and Number:
Japanese Patent JP4714723
Kind Code:
B2
Abstract:
The circuit has a silicon transistor layer (110) for different logical operation functions, and a magnetic memory layer (120) for storing information required by the functions. A metal routing layer (130) has conductive lines for transmitting information between the transistor layer and the memory layer. An insulating layer (140) is placed between the transistor layer and the memory layer. The magnetic memory layer is stacked on the routing layer.

Inventors:
Li James Qi
Agan Tom Allen
Application Number:
JP2007295062A
Publication Date:
June 29, 2011
Filing Date:
November 14, 2007
Export Citation:
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Assignee:
Northern Lights Semiconductor Corporation
International Classes:
G11C11/15
Domestic Patent References:
JP11251518A
JP2001274355A
JP2005235307A
JP2008099284A
JP2008099287A
Foreign References:
US20020141233
WO2006080908A1
US20060164124
Attorney, Agent or Firm:
Masayuki Masabayashi
Hayashi Ichiyoshi
Fumihiko Yagisawa
Keiji Masaki



 
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