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Title:
INTEGRATED QUANTITY TOTALIZATION DEVICE
Document Type and Number:
Japanese Patent JPS6020293
Kind Code:
A
Abstract:

PURPOSE: To prevent the operation of integrated quantity due to an invalid indiscrete signal and check an error early in an integrating data processing by monitoring the propriety of the indiscrete signal of an integrating counter at a fixed interval.

CONSTITUTION: The integrating counter (a) counts the output pulse from an integrator and generates an output in response to the count value. The value of this integrating counter (a) is read to a change detection means (b) at a fixed period to detect the presence or absence of the change and the variation. It is decided by the decision means (c) whether or not the variation and the unchanged frequency are included in a scheduled allowable range. By means of the decision results, it is outputted by the output means (d) that the integrating counter (a) is faulty. The means (e), which is outputted delaying by a fixed time from the time of the output change of the change detection means (b), and the means (f) and (g), which process prescribed operation, are provided to prevent the erroneous totalization due to the reading during the operation of the integrating counter (a).


Inventors:
HAMAKAWA KENICHI
Application Number:
JP12783483A
Publication Date:
February 01, 1985
Filing Date:
July 15, 1983
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
G06M1/00; G06M3/12; (IPC1-7): G06M1/10
Attorney, Agent or Firm:
Noriyuki Noriyuki