To provide an integration circuit, an A/D conversion circuit and an integration method capable of accurately improving integration characteristics.

In this circuit, provided with a capacitor C connected in parallel to an operation amplifier A, the capacitor CR1 for resistance component generation serially connected to the parallel circuit of the operational amplifier A and a capacitor C and a capacitor CR2 for the resistance component generation parallelly connected to the parallel circuit of the operational amplifier A and the capacitor C for cyclically applying digital signals S1 to the capacitors CR1 and CR2 for the resistance component generation by a signal applying operation through switching signals and obtaining integration output, the control timings 1 and 2 of digital signals S1 and the switching signals are set, so as not to change the digital signals S1 during a signal applying operation period for cyclically applying the digital signals S1 to the capacitors CR1 and CR2 for the resistance component generation by the signal applying operation by the switching signals.