Title:
Interference suppression for switching power supplies with error correction
Document Type and Number:
Japanese Patent JP6285429
Kind Code:
B2
Abstract:
A switched mode power supply arranged to provide a switched supply at one terminal of an inductor, another terminal of the inductor being connected to a first input of an error amplifier having a reference signal at a second input, the error amplifier generating a corrected switched supply at an output in dependence on the difference between signals at its first and second inputs, there being provided a feedback path between the output of the error amplifier and the first input of the error amplifier, and further comprising circuitry for sensing a switcher interference current in the feedback path of the error amplifier, and for adjusting the corrected switched supply output to reduce the switcher interference current in the output.
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Inventors:
Wilson, Martin
Application Number:
JP2015520967A
Publication Date:
February 28, 2018
Filing Date:
July 10, 2013
Export Citation:
Assignee:
EPCOS AG
International Classes:
H03F1/02
Domestic Patent References:
| JP2012029186A |
Foreign References:
| WO2012046668A1 | ||||
| US20110109387 | ||||
| US20090191826 |
Attorney, Agent or Firm:
Yu Koyama
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