PURPOSE: To enable the layout of an integrated circuit to meet design rules by a method wherein a part which does not meet a minimum space from an intermediate point between the apexes of a polygon of a layout drawing is retrieved and corrected.
CONSTITUTION: The coordinates of the apexes of a polygon of a layout diagram of the same potential in the same mask layer in an integrated circuit are obtained in a process 105. Combinations of two apexes, wherein a distance between the coordinates of the apexes is smaller than the minimum width of a mask layer determined by design rules, and an intermediate point between the apexes is located inside the polygon, are obtained in a process 106. In a process 107, concerning the obtained combinations of two apexes, a rectangle, whose side is longer than the minimum width determined by the design rules and which is on the same mask layer with the polygon of the layout diagram, is so generated as to enable its center coordinates to be located at the intermediate point between the two apexes and inserted. The above processes are sequentially carried out, and consequently even if a layout diagram whose width is smaller than the minimum width determined by the design rules is present in an oblique direction, a layout diagram which meets the design rules is generated to make corrections.
MIZUNO HIROSHI
KAKIAGE SETSUKO
SAIGA SHUNJI
TANAKA YASUHIRO
MAE YOICHIRO
