Title:
LIBRARY FOR ARRANGEMENT AND WIRING OF INTEGRATED CIRCUIT, AND WIRING METHOD
Document Type and Number:
Japanese Patent JP3389177
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a library for the arrangement and wiring of an integrated circuit, and a wiring method for improving the wiring performance of outer- marco wiring by limiting and permitting the direction of the passage of the outer-marco wiring over the marco.
SOLUTION: The coordinates of a region, set as a wiring limiting region, are decided from an SRAM layout (S2). Then, the wiring direction of inter- SRAM marco digit line is detected (S3), and the wiring direction of the wiring limiting region is set as a direction orthogonally crossing the direction of digit line (S4, S5). Afterwards, a library for SRAM marco arrangement, and wiring is generated from the coordinates of the wiring limiting region and the limited wiring direction (S6, S7). Then, the wiring positions are decided through automatic arrangement processings, by using the library for the SRAM marco arrangement and wiring including the wiring lining region and the library of the other marco cells and standard cells (S10), and wiring is installed taking into consideration the limitation of the wiring direction set in the wiring limiting are by the automatic wiring processing (S11).
Inventors:
Hideaki Futakata
Application Number:
JP33883699A
Publication Date:
March 24, 2003
Filing Date:
November 29, 1999
Export Citation:
Assignee:
NC Microsystem Co., Ltd.
International Classes:
H01L21/82; G06F17/50; (IPC1-7): H01L21/82; G06F17/50
Domestic Patent References:
| JP1167923A | ||||
| JP5205011A | ||||
| JP1272149A |
Attorney, Agent or Firm:
Masanori Fujimaki