Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
ON-LINE SYSTEM OF SEMICONDUCTOR TEST DEVICE
Document Type and Number:
Japanese Patent JP2953912
Kind Code:
B2
Abstract:

PURPOSE: To always allow optimum lot operation, reduce the manhours for checking by operators and suppress the deterioration of operability by providing a means which extracts an operable device or operable lot, a means which decides priority and a means which selects an optimum lot for the subsequent operation.
CONSTITUTION: An on-line system of a plurality of semiconductor test devices 3 and 4 controls the semiconductor test devices 3 and 4 by a host computer 1. This system is provided with a means where the host computer 1 compares the test conditions with the device performance and extracts an operable device or an operable lot on the basis of the information inputted to the host computer 1. The on-line system is provided with a means which decides priority by checking the progress on the basis of the manufacturing plan and the achievement data, a means which selects an optimum lot for the subsequent operation and a means which instructs the selected optimum lot to a terminal computer 2. For example, the semiconductor test device is constituted of the tester 3 and the prober 4.


Inventors:
TAKAHASHI MASAYUKI
Application Number:
JP16371393A
Publication Date:
September 27, 1999
Filing Date:
July 02, 1993
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
YAMAGATA NIPPON DENKI KK
International Classes:
H01L21/66; G01R31/28; (IPC1-7): H01L21/66; G01R31/28
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
Previous Patent: MARKING DEVICE

Next Patent: GERMINATION SUPPRESSOR FOR SEED