Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
LOAD CONTROL SYSTEM FOR PROCESSOR
Document Type and Number:
Japanese Patent JPH10198640
Kind Code:
A
Abstract:

To provide a load control system capable of improving the throughput of the whole system and guaranteeing the throughput of specific operation processing.

A parallel computer system 10 is composed of plural processors 10-11 to 10-MN. The aggregate of processors is defined as a node set to define plural node sets. An evaluation equation expressed by 'evaluation value E = [(threshold T - free guarantee value α) - load L] is set up in each node set, and at the time of allocating jobs, the evaluation value E is found out based on load L measured in each processor, jobs are allocated to processors successively from the processor having the highest evaluation value E, and when the evaluation value E of a processor shared by another node set is ≤0, a new job 15 not allocated to the processor.


Inventors:
SHINDOU SHIGEZUMI
KISHIMOTO YOSHITSUGU
AMEMORI MICHINORI
Application Number:
JP54697A
Publication Date:
July 31, 1998
Filing Date:
January 07, 1997
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
HITACHI LTD
International Classes:
G06F9/46; G06F15/16; G06F15/177; (IPC1-7): G06F15/16; G06F9/46; G06F15/16
Attorney, Agent or Firm:
Kasuga