Title:
LOGARITHMIC AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JP2606599
Kind Code:
B2
Abstract:
PURPOSE: To provide a logarithmic amplifier circuit where the required number of current source is reduced, a logarithmic characteristic can be easily set and changed and power consumption is reduced.
CONSTITUTION: Each of the input signals at each stage of a differential amplifier in a cascade connection and the output signal at the final stage is detected by each rectifier and these detected current is added in an adder. The output of the adder is used as the output of a logarithmic circuit. At this stage, the rectifier is commonly connected with the emitters of transistors 21 to 23 with which a constant current source 24 is connected, and is driven with constant tail current. The collectors of the two transistors 21 and 22 of these transistors are commonly connected, and the voltage from the differential amplifier is inputted between the bases of these collectors. Constant voltage Vc is supplied to the base of the other transistor 23. Either one of current IRS and ISQ outputted from the collectors connected commonly or the collector of the other transistor 23 is added to the adder.
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Inventors:
Kimura
Application Number:
JP21643294A
Publication Date:
May 07, 1997
Filing Date:
September 09, 1994
Export Citation:
Assignee:
NEC
International Classes:
H03G11/08; G06G7/24; H03F3/68; H03G7/00; (IPC1-7): H03G11/08; H03F3/68
Attorney, Agent or Firm:
Umeo Yamauchi