Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
LOGIC CIRCUIT
Document Type and Number:
Japanese Patent JPH06110656
Kind Code:
A
Abstract:

PURPOSE: To provide the logic circuit, which can more reduce circuit scale and can more shorten an operation processing time, concerning the logic circuit for simultaneously adding four pieces of one-bit data.

CONSTITUTION: This logic circuit simultaneously adds the four pieces of one-bit data (a), (b), (c) and (d) and is provided with a sum output circuit 1 for calculating a sum S of the four pieces of one-bit data (a), (b), (c) and (d), one-bit carry circuit 3 for generating a 1st digit carry output Ca at the time of adding the four pieces of one-bit data (a), (b), (c) and (d), and two-bit carry circuit 5 for generating a 2nd digit carry output Cb at the time of adding the four piece of one-bit data (a), (b), (c) and (d).


Inventors:
NAKAHARA TATSURO
YAGASHIRA SHOICHI
Application Number:
JP26004592A
Publication Date:
April 22, 1994
Filing Date:
September 29, 1992
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
KYUSHU FUJITSU ELECTRONIC
International Classes:
G06F7/505; G06F7/50; G06F7/503; H03K19/20; (IPC1-7): G06F7/50; H03K19/20
Attorney, Agent or Firm:
Yasuo Ishikawa



 
Previous Patent: Phase contrast film

Next Patent: MULTIPLIER