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Patent Searching and Data


Title:
LOGIC CIRCUIT
Document Type and Number:
Japanese Patent JPS63232513
Kind Code:
A
Abstract:

PURPOSE: To output an inversion level to previously decided same signal level of two binary input signals and to output two binary input signal levels as they are in other signal levels by providing a specified answer part.

CONSTITUTION: When two binary signals are given to the answer part 2 in the level except the previously decided same level, respective output parts 4 and 6 output the binary signals corresponding to the input binary signal and when the signal in the same level is given, the respective output parts 4 and 6 output the inversion level. Therefore, in the case of inputting two binary input signals in the level except the same level which is previously decided, the binary signal corresponding to the input binary signal is outputted and in the case of inputting in the same level the binary signal of the level obtained by inverting the level is outputted. If the titled logic circuit is provided in the input stage of an RS flip flop, the circuit can be used as the switching signal generation circuit of a duplicated constitution part of an electronic exchange, etc., without providing an output fixing means.


Inventors:
KAWANO HISATO
MIYAZAKI YASUO
OKABE KENICHI
ISE NOBORU
Application Number:
JP6533487A
Publication Date:
September 28, 1988
Filing Date:
March 19, 1987
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K3/037; H04M3/22; (IPC1-7): H03K3/037; H04M3/22
Attorney, Agent or Firm:
Furuya Fumio