PURPOSE: To monitor the flow of instruction executed in real time, by recording the history of jump through sequential memory of the instruction address executing this jump every jump of instruction and decreasing the number of circuits to investigate.

CONSTITUTION: In recording the history of jump instruction used for the debug and failure retrieval of program in real time, the address executing the jump is stored every establishment of jump of instruction at the memory section 10. The memory section 10 stores two ways, write-in and readout operation, to set the operation mode to FF14,15 provided at the address renewal section 1. FF14,15 are controlled with the set and reset signal from the processor 2, the instruction executing the jump is automatically written in the memory section 10, and the address counter 18 performs the renewal of the content of address write-in automatically. Further, the address of instruction executing the jump is stored sequentially in the memory section 10 to monitor the flow of instruction executed in real time.