Title:
LSI TESTER
Document Type and Number:
Japanese Patent JPH11281709
Kind Code:
A
Abstract:
To reduce simultaneous switching noise without degrading the quality of signals.
A voltage Vth (6-1) to terminate the high output of an LSI and a voltage Vtl (6-2) to terminate the low output of the LSI are provided on the side of a tester to switch between these voltages based on test pattern data. In the case that a large number of LSI signal pins are simultaneously changed, the Vth (6-1) and the Vtl (6-2) are each brought close to the output level of the LSI to limit a current flowing into the signal pins of the LSI, to limit the flowing of a current out of and into a power source for the input/ output circuit of the LSI, and to reduce voltage drops in a power source line for the input/output circuit of the LSI.
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Inventors:
KIMURA ICHIRO
Application Number:
JP8322898A
Publication Date:
October 15, 1999
Filing Date:
March 30, 1998
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G01R31/26; G01R31/28; (IPC1-7): G01R31/28; G01R31/26
Attorney, Agent or Firm:
Ogawa Katsuo