PURPOSE: To prevent the economy from being lost even if a fault detecting point is increased, by eliminating fault information from a storage memory after a processor reads out fault information stored in the storage memory.
CONSTITUTION: A processor detecting common information ac transmits a common information reading signal (b) to a signal line 7, a gate 8 is conductive and a fault information reading address (e) is transmitted to a signal line 20. As a result, fault information (a) stored in the fault information reading address (e) applied to a time region TP via a selecting circuit 18 is extracted from a fault information storage memory 16, and transmitted to a signal line 9 via a flip-flop 21 and the gate 8 being conductive state. The processor detecting the fault information (a) discriminates a fault generated in a fault detecting point 1 corresponding to the fault information reading address (e), a reset signal (f) is transmitted to a signal line 22 and written in the fault information reading address (e) of fault information storage memory 16 via a selecting circuit 15, to delete the fault information (a) after detection.
SANBE TAKESHI
FUJIKAWA FUYUKI
SEO TOMIHIDE
HORIKI AKIRA
NIPPON TELEGRAPH & TELEPHONE
OKI ELECTRIC IND CO LTD
NIPPON ELECTRIC CO
HITACHI LTD
| JPS5799854A | 1982-06-21 |
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