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Patent Searching and Data


Title:
MANUFACTURE OF BOTTOM GATE TYPE SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH04334064
Kind Code:
A
Abstract:

PURPOSE: To improve gate withstand voltage, enhance mobility, increase reproducibility, and realize a thin gate insulating film, by enabling flattening the surface form of a gate electrode independently of a substratum.

CONSTITUTION: After an amorphous silicon film 2 is formed on an insulating film 1, P-type impurities are introduced in the silicon film 2. After an island type gate electrode 3 is formed by patterning the amorphous silicon layer 2, a gate insulating film 4 is formed on the whole surface containing the gate electrode 3, and the impurities introduced in the gate electrode 3 are diffused by heat treatment at 800°C for 30 minutes. After a polycrystalline silicon layer 5 is formed on the whole surface, an island type active layer 5 is formed by patterning the polycrystalline silicon layer 5.


Inventors:
KIMURA TADAYUKI
Application Number:
JP10447291A
Publication Date:
November 20, 1992
Filing Date:
May 09, 1991
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/205; H01L21/265; H01L29/78; H01L29/786; (IPC1-7): H01L21/205; H01L21/265; H01L29/784
Attorney, Agent or Firm:
Hidekuma Matsukuma