Title:
MANUFACTURE OF INTEGRATED CIRCUIT FOR HIGH- SPEED ANALOG CHIP USE BY USING LOCAL SILICIDE INTERNAL CONNECTION LINE
Document Type and Number:
Japanese Patent JPH04218956
Kind Code:
A
Abstract:
PURPOSE: To form an integrated circuit provided with high resistance for the analog/digital mixed chip of high integration and high speed locally connected by silicon by forming a double contact MIS transistor and a capacity electrically connected to it into a chip. CONSTITUTION: An electric insulation body having the capacitor 101 is provided in a first area (p), the transistors 58a-40a and 58b-40b are provided in a second area (n) in the state of electrically connecting one of the active bands with the first contact 32c of the capacitor by the silicon 60b and an analog/logic integrated circuit is formed on a substrate 2.
Inventors:
MORISU BONISU
Application Number:
JP5040791A
Publication Date:
August 10, 1992
Filing Date:
February 22, 1991
Export Citation:
Assignee:
CENTRE NAT ETD TELECOMM
International Classes:
H01L21/768; H01L21/8234; H01L21/8242; H01L27/04; H01L21/822; H01L27/088; H01L27/10; H01L27/108; (IPC1-7): H01L27/04; H01L27/088; H01L27/108
Attorney, Agent or Firm:
Tadashi Hagino (3 outside)
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