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Title:
MANUFACTURE OF LITHOGRAPHY SYSTEM, ALIGNER AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2000036462
Kind Code:
A
Abstract:

To improve the matching accuracy of each layer, by storing the hysteresis of the exposure-processing information for a substrate into the substrate for each layer of a plurality of the layers formed on the substrate.

In the lithography method, the characteristic data (two-dimensional position-deviation data at the respective ideal lattice point set in the image field of a projection optical system) of distortion of each aligner (hereinafter called stepper), which are measured by a distortion measuring module 4, are transmitted to data-memory control module (data base) 3 together with the ID code for identifying the respective stepper. In the meantime, m pieces of reticles R1, R2...Rm used in the stepper groups S1-Sn measure the shape distortion and expanding/shrinking amount of the entire circuit pattern region, the position relation between a reticle alignment mark and the circuit pattern region and the like before the mounting to the stepper and the like. The measured data are also transmitted to the data base 3 together with this IC code. A main computer 1 operates and analyzes the respective data of the data base 3.


Inventors:
NISHI TAKECHIKA
Application Number:
JP20735599A
Publication Date:
February 02, 2000
Filing Date:
June 22, 1992
Export Citation:
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Assignee:
NIKON CORP
International Classes:
H01L21/027; G03F7/20; (IPC1-7): H01L21/027; G03F7/20